RTAX-DSP space-flight FPGAs add embedded radiation-tolerant multiply-accumulate blocks to the tried-and-trusted industry-standard RTAX-S product family. The result is a dramatic increase in device performance and utilization when implementing arithmetic functions, such as those encountered in DSP algorithms, without sacrificing reliability or radiation tolerance. RTAX-DSP integrates complex DSP functions into a single device without any external components for code storage and without multiple-chip implementations for radiation mitigation. This gives RTAX-DSP a significant advantage in power consumption and heat dissipation relative to SRAM-based FPGAs.

RTAX-DSP offers high performance at densities of up to 4 million equivalent system gates and 840 user I/Os for space-based applications. Embedded radiation-tolerant DSP Mathblocks feature 18 bit x 18 bit multiply-accumulate blocks enabling efficient implementation of DSP building blocks such as finite impulse response (FIR) and infinite impulse response (IIR) digital filters, fast Fourier transforms (FFT) and inverse Fourier transforms (IFT), discrete cosine transforms (DCT), and Reed Solomon encoding algorithms. The RTAX-DSP family features up to 120 Mathblocks, each capable of operating at 125 MHz over the full military temperature range (-55°C to 125°C), for a total throughput of 15 billion multiply/accumulates per second (15 GMACS).

RTAX-DSP Architecture

The RTAX-DSP family features SEU-hardened flip-flops for protection against the effects of heavy ion radiation in space. Up to 840 I/Os are available, accessed using Land Grid Array or Ceramic Column Grid Array packages.

Key Features

• Highly reliable, nonvolatile antifuse technology
• 250 k to 500 k ASIC gates (2 to 4 million system gates)
• Up to 120 DSP Mathblocks with 125 MHz 18 bit x 18 bit multiply-accumulate
• Up to 540 kbits of embedded memory with optional EDAC protection
• Up to 840 user-programmable I/Os
• Total Dose: 300 krad (functional) and 200 krad (parametric)
• SEU less than 1E^-10 errors per bit-day (worst-case GEO)
• SEL immune to LET_TH in excess of 117 MeV-cm²/mg
• SEU immune to LET_TH > 37 MeV-cm²/mg
• Advanced CCGA and LGA packaging for space applications
• Screening: E-Flow (Actel Extended Flow), B-Flow (Mil-STD-883B), and EV-Flow (Class V Flow processing as per MIL-PRF-38535)

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