The latest antifuse FPGA family offered by Actel, Axcelerator offers high performance and unprecedented design security at densities of up to 2 million equivalent system gates.
Utilizing the Actel AX architecture, Axcelerator devices have several system-level features, such as embedded SRAM (with embedded FIFO control logic), PLLs, segmentable clocks, chip-wide highway routing, and carry logic.
Based upon 0.15 µm, seven-layers-of-metal CMOS antifuse process technology, Axcelerator devices offer a level of performance previously only available in ASIC technology.
Key Features
- 350 MHz system performance
- 500+ MHz internal performance
- 500+ MHz embedded FIFOs
- PLL output up to 1 GHz and 8 PLLs per device
- 6 levels of logic at 156+ MHz
- 1.5 V, 1.8 V, 2.5 V, and 3.3 V mixed-voltage operation
- 8 I/O banks per device
- 8 global clocks per device
- 4.5 kbits variable-aspect RAM blocks with built-in FIFO control
- Intelligent low power operation
- Secure programming technology prevents reverse engineering and design theft
- Available in military temperature grades
Download: Axcelerator pruduct Brief (472 KB)
